A.2. Clock signals

Table A.1 shows the clock and clock enable signals.

Table A.1. Clock and clock enable signals

SignalTypeDescription
CLKInput

Global clock.

CLKEN

Input

Global clock enable. This signal can only be deasserted when all the processors in the MPCore device and the L2 are in WFI low-power state, and the ACE/CHI and ACP interfaces are idle.


See Clocking and resets for more information.

Copyright © 2013, 2014 ARM. All rights reserved.ARM DDI 0488D
Non-ConfidentialID012914