7.7. External coherent interfaces

The Cortex-A57 MPCore multiprocessor provides configurable options for either AMBA4 AXI Coherency Extensions (ACE) or CHI interconnect architectures.

Each interface option provides a 128-bit wide data interface to the system and supports 1:1 clock ratios with respect to the processor clock and N:1, integer multiple clock ratios, of the processor clock.

Note

ACE is supported with the following restriction:

  • ARQOS and AWQOS signals are not present.

This section describes:

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