7.7.1. L2 memory interface attributes

Table 7.4 shows the L2 memory interface attributes for the multiprocessor. The table lists the maximum possible values for the read and write issuing capabilities.

Table 7.4. L2 memory interface attributes

AttributeValueDescription
Write issuing capability16

16 outstanding writes supported that can be evictions, single writes, or write bursts of any memory type.

Read issuing capability15 or 19

If the processor implements:

16-entry FEQ

15 outstanding reads supported that can be line fills, single reads, or read bursts of any memory type.

20-entry FEQ[a]

19 outstanding reads supported that can be line fills, single reads, or read bursts of any memory type.

Snoop acceptance capability2020 outstanding snoops from being accepted on the AC channel to response being accepted on the CR channel.

[a] The 20-entry L2 FEQ implementation option is available only in r1p0 and later revisions.


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