B.1.1. Use of R15 by instruction

The Cortex-A57 MPCore processor does not implement a Read 0 policy on unpredictable use of R15 by instruction. Instead, the processor reads the PC with the standard offset that applies for the current instruction set with alignment to a word boundary.

Word-alignment of the PC is imposed for all T32 instructions that are either:

With the notable exceptions to this alignment policy that:

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