| Copyright © 2013, 2014 ARM. All rights reserved. | ARM DDI 0488D |
| Non-Confidential | ID012914 |
 PDF version | |
| Home > AArch32 UNPREDICTABLE Behaviors > Debug UNPREDICTABLE behaviors > n ≥ M: Direct access to PMEVCNTRn_EL0 and PMEVTYPERn_EL0 |
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| Home > AArch32 UNPREDICTABLE Behaviors > Debug UNPREDICTABLE behaviors > n ≥ M: Direct access to PMEVCNTRn_EL0 and PMEVTYPERn_EL0 | |||
The processor implements:
If n ≥ N then the instruction is unallocated.
Otherwise if n ≥ M then the register is res0.
| Copyright © 2013, 2014 ARM. All rights reserved. | ARM DDI 0488D |
| Non-Confidential | ID012914 |
| PDF version | |
| Home > AArch32 UNPREDICTABLE Behaviors > Debug UNPREDICTABLE behaviors > n ≥ M: Direct access to PMEVCNTRn_EL0 and PMEVTYPERn_EL0 |