10.8.5. External Debug Integration Mode Control Register

The EDITCTRL characteristics are:

Purpose

Enables the external debug to switch from its default mode into integration mode, where test software can control directly the inputs and outputs of the processor, for integration testing or topology detection.

Usage constraints

Accessible through the internal memory-mapped interface and the external debug interface. The access conditions are:

OffDLKOSLKEDADSLKDefault
ErrorErrorError-RORW

Table 10.1 describes the access conditions.

Configurations

EDITCTRL is in the Core power domain.

Attributes

See the register summary in Table 10.10.

Figure 10.11 shows the EDITCTRL bit assignments.

Figure 10.11. EDITCTRL bit assignments

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Table 10.15 shows the EDITCTRL bit assignments.

Table 10.15. EDITCTRL bit assignments

BitsNameFunction
[31:1]-

Reserved, res0.

[0]IME

When IME is set to 1, the device reverts to an integration mode to enable integration testing or topology detection:

0

Normal operation.

1

Integration mode enabled.


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