12.6. Cross trigger register descriptions

This section describes the Cortex-A57 MPCore multiprocessor cross trigger registers. The Table 12.3 provides cross-references to the individual registers.

The Integration Test registers are provided to simplify the process of verifying the integration of the ECT with other devices in a CoreSight system. These registers enable direct control of outputs and the ability to read the value of inputs. You must only use these registers when the CTIITCTRL.IME bit is set to 1. See the ARM® Architecture Reference Manual ARMv8 for more information.

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