13.7.5. Trace Synchronization Period Register

The TRCSYNCPR characteristics are:

Purpose

Controls how often periodic trace synchronization requests occur.

Usage constraints

Only accepts writes when the trace unit is disabled.

This register must be programmed.

Configurations

Available in all configurations.

Attributes

A 32-bit RW trace register.

See the register summary in Table 13.3.

Figure 13.6 shows the TRCSYNCPR bit assignments.

Figure 13.6. TRCSYNCPR bit assignments

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Table 13.8 shows the TRCSYNCPR bit assignments.

Table 13.8. TRCSYNCPR bit assignments

BitsNameFunction
[31:5]-Reserved, res0.
[4:0]PERIOD

Controls how many bytes of trace, the sum of instruction and data, that a trace unit can generate before a periodic trace synchronization request occurs.

When 0b00000, periodic trace synchronization requests are disabled. This setting does not disable other types of trace synchronization request.

The number of bytes is always a power of two and the permitted values are:

0b01000

Periodic trace synchronization request occurs after 28, or 256 bytes of trace.

0b01001

Periodic trace synchronization request occurs after 29, or 512 bytes of trace.

0b01010

Periodic trace synchronization request occurs after 210, or 1024 bytes of trace.

.

.

.

.

.

.

0b10100

Periodic trace synchronization request occurs after 220, or 1048576 bytes of trace.


The TRCSYNCPR can be accessed through the internal memory-mapped interface and the external debug interface, offset 0x034.

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