10.8.4. External Debug Integration Input Status Register

The EDITISR characteristics are:

Purpose

Enables the values of signal inputs to be read when EDITCTRL.IME is set. See External Debug Integration Mode Control Register.

Usage constraints

Accessible through the internal memory-mapped interface and the external debug interface. The access conditions are:

OffDLKOSLKEDADSLKDefault
ErrorErrorError--RO

Table 10.1 describes the access conditions.

Configurations

EDITISR is in the Core power domain.

Attributes

See the register summary in Table 10.10.

Figure 10.10 shows the EDITISR bit assignments.

Figure 10.10. EDITISR bit assignments

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Table 10.14 shows the EDITISR bit assignments.

Table 10.14. EDITISR bit assignments

BitsNameFunction
[31:3]-

Reserved, res0.

[2]CTI DBGRESTART

CTI debug restart bit. This bit reads the state of the debug restart input coming from the CTI into the debug unit.

[1]CTI EDBGRQ

CTI debug request bit. This bit reads the state of the debug request input coming from the CTI into the debug unit.

[0]EDBGRQ

This bit reads the state of the EDBGRQ input.


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