10.8.6. External Debug Device ID Register 1

The EDDEVID1 characteristics are:


Provides extra information for external debuggers about features of the debug implementation.

Usage constraints

Accessible through the internal memory-mapped interface and the external debug interface. The access conditions are:


Table 10.1 describes the access conditions.


The EDDEVID1 is in the Debug power domain.


See the register summary in Table 10.10.

Figure 10.12 shows the EDDEVID1 bit assignments.

Figure 10.12. EDDEVID1 bit assignments

To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.

Table 10.16 shows the EDDEVID1 bit assignments.

Table 10.16. EDDEVID1 bit assignments


Reserved, res0.


Indicates the offset applied to PC samples returned by reads of EDPCSR. For ARMv8 the value is:


EDPCSR samples have no offset applied and do not sample the instruction set state in AArch32 state.

Copyright © 2013, 2014 ARM. All rights reserved.ARM DDI 0488D