13.7.17. Trace ID Register 0

The TRCIDR0 characteristics are:


Returns the tracing capabilities of the trace unit.

Usage constraints

There are no usage constraints.


Available in all configurations.


See the register summary in Table 13.3.

Figure 13.18 shows the TRCIDR0 bit assignments.

Figure 13.18. TRCIDR0 bit assignments

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Table 13.20 shows the TRCIDR0 bit assignments.

Table 13.20. TRCIDR0 bit assignments


Reserved, res0.


Commit mode field. This value is:


Commit mode 1.


Global timestamp size field. This value is:


Implementation supports a maximum global timestamp of 64 bits.


Reserved, res0.


Q element support field. This value is:


Q element support is not implemented. TRCCONFIGR is res0.


QFILT is res0 when QSUPP is 0b00.


CONDTYPE is res0 when TRCCOND is 0b0.


Number of events field. Indicates how many events the trace unit supports. This value is:


The trace unit supports 4 events.


Return stack bit. Indicates whether the implementation supports a return stack. This value is:


Return stack is implemented. TRCCONFIGR.RS is supported.


Reserved, res0.


Cycle counting instruction bit. Indicates whether the trace unit supports cycle counting for instructions. This value is:


Cycle counting in the instruction trace is implemented, therefore:

  • TRCCONFIGR.CCI is supported.

  • TRCCCTLR is supported.


Conditional instruction tracing support bit. Indicates whether the trace unit supports conditional instruction tracing. This value is:


Conditional instruction tracing is not supported.


Branch broadcast tracing support bit. Indicates whether the trace unit supports branch broadcast tracing. This value is:


Branch broadcast tracing is supported, therefore:

  • TRCCONFIGR.CCI is supported.

  • TRCBBCTLR is supported.


Conditional tracing field. This value is:


Data tracing is not supported.


P0 tracing support field. This value is:


Tracing of load and store instructions as P0 elements is not supported.


Reserved, res1.

The TRCIDR0 can be accessed through the internal memory-mapped interface and the external debug interface, offset 0x1E0.

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