4.4.15. c15 registers

Table 4.96 shows the System registers when CRn is c15 and the processor is in AArch32 state.

Table 4.96. c15 register summary

op1CRmop2NameTypeResetDescription
0c00IL1DATA0RWUNKInstruction L1 Data n Register, EL1.
 1IL1DATA1
 2IL1DATA2
 3IL1DATA3
 c10DL1DATA0RWUNKData L1 Data n Register, EL1.
 1DL1DATA1
 2DL1DATA2
 3DL1DATA3
 4DL1DATA4
 c40RAMINDEX[a]WO-RAM Index operation.
1c00L2ACTLRRW0x00000010[b]L2 Auxiliary Control Register. See L2 Auxiliary Control Register, EL1.
 c30CBARRO-[c]Configuration Base Address Register.

[a] RAMINDEX is a system operation.

[b] The reset value is 0x00000010 for an ACE interface and 0x00004018 for a CHI interface.

[c] The reset value depends on the primary input, PERIPHBASE[43:18].


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