3.4.1. Register summary

Table 3.3 gives a summary of the multiprocessor Jazelle registers that are accessed through the CP14 coprocessor in the AArch32 state. These registers are not implemented in the AArch64 state.

Table 3.3. Summary of Jazelle registers

c07c00JIDR0x00000000Jazelle Identity Register
c17c00JOSCR0x00000000Jazelle OS Control Register
c27c00JMCR0x00000000Jazelle Main Configuration Register

Copyright © 2013, 2014 ARM. All rights reserved.ARM DDI 0488D