4.2.8. AArch64 miscellaneous operations

Table 4.9 shows the miscellaneous operations in AArch64 state. See the ARM® Architecture Reference Manual ARMv8 for more information about these operations.

Table 4.9. AArch64 miscellaneous System operations

NameTypeResetWidthDescription
TPIDR_EL0RWUNK64

Thread Pointer / ID Register, EL0

TPIDR_EL1RWUNK64

Thread Pointer / ID Register, EL1

TPIDRRO_EL0RW [a]UNK64

Thread Pointer / ID Register, Read-Only, EL0

TPIDR_EL2RWUNK64

Thread Pointer / ID Register, EL2

TPIDR_EL3RWUNK64

Thread Pointer / ID Register, EL3

[a] RO at EL0.


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