4.4.25. Miscellaneous operations

Table 4.107 shows the System instructions and the registers for miscellaneous operations in AArch32 state.

Table 4.107. Miscellaneous System operations

NameCRnop1CRmop2TypeResetDescription
CP15ISBc74c54-UNKInstruction Synchronization Barrier operation, this operation is deprecated in ARMv8-A
CP15DSB c104-UNKData Synchronization Barrier operation, this operation is deprecated in ARMv8-A
CP15DMB  5-UNKData Memory Barrier operation, this operation is deprecated in ARMv8-A
TPIDRURWc130c02RWUNKUser Read/Write Thread ID Register [a]
TPIDRURO  3RW [b]UNKEL1 only Thread ID Register [a]
TPIDRPRW  4RWUNKHyp Software Thread ID Register [a]
HTPIDR 4c02RWUNKUser Read-Only Thread ID Register [a]

[a] See the ARM® Architecture Reference Manual ARMv8 for more information.

[b] RO at EL0.


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