2.2.2. Accelerator Coherency Port

The multiprocessor implements an Accelerator Coherency Port (ACP). This is an AMBA 4 AXI slave interface.

The ACP slave interface supports memory coherent accesses to the Cortex-A57 MPCore multiprocessor memory system, but cannot receive coherent requests, barriers, or distributed virtual memory messages.

See ACP and the ARM® AMBA® AXI™ and ACE™ Protocol Specification.

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