9.3.2. AArch32 Generic Timer register summary

Table 9.3 shows the AArch32 Generic Timer registers. See the ARM® Architecture Reference Manual ARMv8 for information about these registers.

Table 9.3. AArch32 Generic Timer registers

NameCRnop1CRmop2TypeResetWidthDescription
CNTFRQc140c00RW [a]UNK32-bit

Timer Counter Frequency register

CNTPCT-0c14-ROUNK64-bitPhysical Timer Count register
CNTKCTLc140c10RW-[b]32-bit

EL1 Timer Control register

CNTP_TVAL  c20RWUNK32-bit

EL1 Physical Timer TimerValue register

CNTP_CTL   1RW

-[c]

32-bit

EL1 Physical Timer Control register

CNTV_TVAL  c30RWUNK32-bit

Virtual Timer TimerValue register

CNTV_CTL   1RW[c]32-bit

Virtual Timer Control register

CNTVCT-1c14-ROUNK64-bitVirtual Timer Count register
CNTP_CVAL 2  RWUNK64-bitEL1 Physical Timer CompareValue register
CNTV_CVAL 3  RWUNK64-bitVirtual Timer CompareValue register
CNTVOFF 4  RWUNK64-bitVirtual Timer Offset register
CNTHCTLc144c10RW

-[d]

32-bit

EL2 Timer Control register

CNTHP_TVAL  c20RWUNK32-bit

EL2 Physical Timer TimerValue register

CNTHP_CTL   1RW[c]32-bitEL2 Physical Timer Control register
CNTHP_CVAL-6c14-RWUNK64-bitEL2 Physical Timer CompareValue register

[a] Only at EL3, otherwise this register is RO.

[b] The reset value for bits[9:8, 2:0] is 0b00000.

[c] The reset value for bit[0] is 0.

[d] The reset value for bit[2] is 0 and for bits[1:0] is 0b11.


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