13.7.38. ETM Component Identification Registers

There are four read-only ETM Component Identification Registers, Component ID0 to Component ID3. Table 13.44 shows these registers.

Table 13.44. Summary of the ETM Component Identification Registers

RegisterValueOffset
TRCCIDR00x0D0xFF0
TRCCIDR10x900xFF4
TRCCIDR20x050xFF8
TRCCIDR30xB10xFFC

The ETM Component Identification Registers identify ETM as a CoreSight component.

The ETM Component ID registers are:

ETM Component Identification Register 0

The TRCCIDR0 characteristics are:

Purpose

Provides information to identify a trace component.

Usage constraints
  • Only bits[7:0] are valid.

  • Accessible only from the memory-mapped interface or the external debugger interface.

Configurations

Available in all implementations.

Attributes

See the register summary in Table 13.3.

Figure 13.41 shows the TRCCIDR0 bit assignments.

Figure 13.41. TRCCIDR0 bit assignments

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Table 13.45 shows the TRCCIDR0 bit assignments.

Table 13.45. TRCCIDR0 bit assignments

BitsNameFunction
[31:8]-

Reserved, res0.

[7:0]PRMBL_0
0x0D

Preamble byte 0.


TRCCIDR0 can be accessed through the internal memory-mapped interface and the external debug interface, offset 0xFF0.

ETM Component Identification Register 1

The TRCCIDR1 characteristics are:

Purpose

Provides information to identify a trace component.

Usage constraints
  • Only bits[7:0] are valid.

  • Accessible only from the memory-mapped interface or the external debugger interface.

Configurations

Available in all implementations.

Attributes

See the register summary in Table 13.3.

Figure 13.42 shows the TRCCIDR1 bit assignments.

Figure 13.42. TRCCIDR1 bit assignments

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Table 13.46 shows the TRCCIDR1 bit assignments.

Table 13.46. TRCCIDR1 bit assignments

BitsNameFunction
[31:8]-

Reserved, res0.

[7:4]CLASS
0x9

Debug component.

[3:0]PRMBL_1
0x0

Preamble.


TRCCIDR1 can be accessed through the internal memory-mapped interface and the external debug interface, offset 0xFF4.

ETM Component Identification Register 2

The TRCCIDR2 characteristics are:

Purpose

Provides information to identify a CTI component.

Usage constraints
  • Only bits[7:0] are valid.

  • Accessible only from the memory-mapped interface or the external debugger interface.

Configurations

Available in all implementations.

Attributes

See the register summary in Table 13.3.

Figure 13.43 shows the TRCCIDR2 bit assignments.

Figure 13.43. TRCCIDR2 bit assignments

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Table 13.47 shows the TRCCIDR2 bit assignments.

Table 13.47. TRCCIDR2 bit assignments

BitsNameFunction
[31:8]-

Reserved, res0.

[7:0]PRMBL_2
0x05

Preamble byte 2.


TRCCIDR2 can be accessed through the internal memory-mapped interface and the external debug interface, offset 0xFF8.

ETM Component Identification Register 3

The TRCCIDR3 characteristics are:

Purpose

Provides information to identify a trace component.

Usage constraints
  • Only bits[7:0] are valid.

  • Accessible only from the memory-mapped interface or the external debugger interface.

Configurations

Available in all implementations.

Attributes

See the register summary in Table 13.3.

Figure 13.44 shows the TRCCIDR3 bit assignments.

Figure 13.44. TRCCIDR3 bit assignments

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Table 13.48 shows the TRCCIDR3 bit assignments.

Table 13.48. TRCCIDR3 bit assignments

BitsNameFunction
[31:8]-

Reserved, res0.

[7:0]PRMBL_3
0xB1

Preamble byte 3.


TRCCIDR3 can be accessed through the internal memory-mapped interface and the external debug interface, offset 0xFFC.

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