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ARM® Cortex®-A57 MPCore Processor Technical Reference ManualRevision r1p2
Home > System Control > AArch64 register descriptions > Auxiliary ID Register, EL1

4.3.24 Auxiliary ID Register, EL1

The processor does not implement AIDR_EL1. This register is always RES0.
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Home > System Control > AArch64 register descriptions > Auxiliary ID Register, EL1