The processor does not set any IMPLEMENTATION DEFINED attributes in the Auxiliary Memory Attribute Indirection Registers. AMAIR_EL1 and AMAIR_EL3 are RES0.

AMAIR_EL1[31:0] is architecturally mapped to the Non-secure AArch32 AMAIR0 register.

AMAIR_EL1[63:32] is architecturally mapped to the Non-secure AArch32 AMAIR1 register.

AMAIR_EL3[31:0] is architecturally mapped to the Secure AArch32 AMAIR0 register.

AMAIR_EL3[63:32] is architecturally mapped to the Secure AArch32 AMAIR1 register.

The Non-secure and Secure AArch32 AMAIR0 and AMAIR1 registers are RES0.