4.4 AArch32 register summary

This section gives a summary of the System registers in AArch32 state.

The System registers are a set of registers that you can write to and read from. Some of the registers permit more than one type of operation.
The registers are accessed by the MCR and MRC instructions for 32-bit registers and the MCRR and MRRC instructions for 64-bit registers. The following subsections describe the System registers grouped by CRn in the order of op1, CRm, and op2:
The following subsection describes the 64-bit registers and provides cross-references to individual register descriptions:
In addition to listing the System registers by CRn ordering, the following subsections describe the System registers by functional group:
The following table describes the column headings that the System register summary tables use throughout AArch32 state. These correspond to fields within the MCR and MRC instruction mnemonics:
MCR p15, op1, Rt, CRn, CRm, op2
MRC p15, op1, Rt, CRn, CRm, op2

Table 4-83 Column headings definition for System register summary tables

Column name Description
CRn Register number within the System registers
op1 Opcode_1 value for the register
CRm Operational register number within CRn
op2 Opcode_2 value for the register
Name Short form architectural, operation, or code name for the register
One of:
  • Read-only (RO).
  • Write-only (WO).
  • Read/write (RW).
Reset Reset value of register
Description Cross-reference to register description
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