5.8.7. Integration with Flash memory

When executing 32-bit instructions, the processor execution bandwidth can be as high as 64 bits per cycle. For 16-bit instructions, it can be as high as 32 bits per cycle. The overall bandwidth is very application specific, however, for general-purpose products, assume 64 bits per cycle is required. The I-side memory system must sustain this bandwidth for maximum performance. Arm recommends that if Flash is integrated on the ITCM interface, you use a system cache or Flash accelerator to satisfy these fetch bandwidth requirements. Alternatively, Flash can be integrated on the AXIM and the processor can be configured to include the I-cache.

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