3.3.6. Instruction and Data Tightly-Coupled Memory Control Registers

The CM7_ITCMCR and CM7_DTCMCR characteristics are:

Purpose

Controls whether an access is mapped to TCM or AXIM interface.

Usage Constraints

Accessible in privileged mode only.

Configurations

Available in all configurations.

Attributes

See the register summary in Table 3.1.

Figure 3.6 shows the CM7_ITCMCR and CM7_DTCMCR bit assignments.

Figure 3.6. CM7_ITCMCR and CM7_DTCMCR bit assignments

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Table 3.9 shows the CM7_ITCMCR and CM7_DTCMCR bit assignments.

Table 3.9. CM7_ITCMCR and CM7_DTCMCR bit assignments

BitsNameTypeFunction
[31:7]--Reserved.
[6:3]SZRO

TCM size. Indicates the size of the relevant TCM:

0b0000

No TCM implemented.

0b0011

4KB.

0b0100

8KB.

0b0101

16KB.

0b0110

32KB.

0b0111

64KB.

0b1000

128KB.

0b1001

256KB.

0b1010

512KB.

0b1011

1MB.

0b1100

2MB.

0b1101

4MB.

0b1110

8MB.

0b1111

16MB.

All other encodings are reserved. The reset value is derived from the CFGITCMSZ and CFGDTCMSZ pins.

[2]RETENRW

Retry phase enable. When enabled the processor guarantees to honor the retry output on the corresponding TCM interface, re-executing the instruction that performed the TCM access.

0

Retry phase disabled.

1

Retry phase enabled.

The reset value is derived from the INITRETRYEN pin. The retry functionality can be used together with external logic to support error detection and correction in the TCM.

[1]RMWRW

Read-Modify-Write (RMW) enable. Indicates that all writes to TCM, that are not the full width of the TCM RAM, use a RMW sequence:

0

RMW disabled.

1

RMW enabled.

The reset value is derived from the INITRMWEN pin. The RMW functionality can be used together with external logic to support error detection and correction in the TCM.

[0]ENRW

TCM enable. When a TCM is disabled all accesses are made to the AXIM interface.

0

TCM disabled.

1

TCM enabled.

The reset value is derived from the INITTCMEN pin.


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