7.3.1. Interrupt Controller Type Register

The ICTR characteristics are:

Purpose

Shows the number of interrupt lines that the NVIC supports.

Usage Constraints

There are no usage constraints.

Configurations

Available in all configurations.

Attributes

See the register summary in Table 7.1.

Figure 7.1 shows the ICTR bit assignments.

Figure 7.1. ICTR bit assignments

To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.


Table 7.2 shows the ICTR bit assignments.

Table 7.2. ICTR bit assignments

Bits Name Function
[31:4]-Reserved.
[3:0]INTLINESNUM

Total number of interrupt lines in groups of 32:

0b0000

0-32.

0b0001

33-64.

0b0010

65-96.

0b0011

97-128.

0b0100

129-160.

0b0101

161-192.

0b0110

193-224.

0b0111

225-256[a].

[a] The processor supports a maximum of 240 external interrupts.


Copyright © 2014-2016, 2018 Arm. All rights reserved.ARM DDI 0489F
Non-ConfidentialID121118