3.14.8. Debug LPI Cache Statistics

The GITS_TRKLCR characteristics are:


This register gives the count of hits and misses in the LPI cache since the last time the Cache Count Reset bit in the GITS_TRKCTLR register was set to 0b1.

Use this register to decide whether you want the LPI cache to be any larger. If the ratio of hits to misses is low, you can increase the size of the LPI cache to reduce latency and power consumption. You can increase its size using the LPI cache entries parameter. See Configurable options.

Usage constraints

There are no usage constraints.


Present in configurations of the GIC-500 with ITS and LPI support.


See the register summary in Table 3.21.

Figure 3.18 shows the bit assignments.

Figure 3.18. GITS_TRKLCR bit assignments

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Table 3.29 shows the bit assignments.

Table 3.29. GITS_TRKLCR bit assignments





LPI cache hits

Records the number of hits in the LPI cache
[15:0]LPI cache missesRecords the number of misses in the LPI cache

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