3.8. Redistributor registers for SGIs and PPIs summary

Table 3.9 shows the address map of the Redistributor registers for SGIs and PPIs Registers.

Offsets that are not shown are Reserved and RAZ/WI.

Note

These registers are all Reserved and RAZ/WI when using backwards compatibility mode.

Table 3.9. Redistributor registers for SGIs and PPIs summary

Offset

Name

Type

Reset

Description

0x0000-0x007C---Reserved

0x0080

GICR_IGROUPR0

RW

0x00000000

Interrupt Group Registers[a]

0x0084-0x0FFC---Reserved

0x0100

GICR_ISENABLER0

RW

0x00000000

Interrupt Set-Enable Registers

0x0104-0x017C---Reserved

0x0180

GICR_ICENABLER0

RW

0x00000000

Interrupt Clear-Enable Registers

0x0184-0x01FC---Reserved

0x0200

CICR_ISPENDR0

RW

0x00000000

Interrupt Set-Pending Registers

0x0204-0x027C---Reserved

0x0280

GICR_ICPENDR0

RW

0x00000000

Interrupt Clear-Pending Registers

0x0284-0x02FC---Reserved

0x0300

GICR_ISACTIVER0

RW

0x00000000

Interrupt Set-Active Registers

0x0304-0x037C---Reserved

0x0380

GICR_ICACTIVER0

RW

0x00000000

Interrupt Clear-Active Registers

0x0384-0x03FC---Reserved
0x0400-0x041C

GICR_IPRIORITYRn

RW0x00000000

Interrupt Priority Registers

0x0420-0x0BFC---Reserved

0x0C00

GICR_ICFGRn

RO

SGIs: 0xAAAAAAAA[b]

Interrupt Configuration Registers

0x0C04

RW

PPIs: 0x00000000

0x0C08-0x0CFC---Reserved

0x0D00

GICR_IGRPMODR0

RW

0x00000000

Interrupt Group Modifier Registers

0x0D04-0x0DFC---Reserved

0x0E00

GICR_NSACR

RW

0x00000000

Non-secure Access Control Registers

0x0E04-0xBFFC---Reserved
0xC000GICR_MISCSTATUSRRO-Miscellaneous Status Register
0xC080GICR_PPISRRO-Private Peripheral Interrupt Status Register
0xC084-0xFFFC---Reserved

[a] This register is only accessible from a Secure access.

[b] When GIC-500 is configured to have ARE as programmable, this register is Reserved and RAZ/WI if ARE is 0 for the security state of the SGI.


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