3.14. Implementation defined test registers in the GITS control page summary

Table 3.21 shows the address map of the implementation defined test registers in the GITS control page.

Offsets that are not shown are Reserved and RAZ/WI.

Table 3.21. Implementation defined test register summary

Offset

Name

Type

Reset

Description

0xC000

GITS_TRKCTLR

WO

-

Tracking Control Register

0xC004

GITS_TRKR

RO

0x00000000

Tracking Status Register

0xC008

GITS_TRKDIDR

RO

0x00000000

Debug Tracked DID Register
0xC00CGITS_TRKPIDRRO0x00000000Debug Tracked PID Register
0xC010GITS_TRKVIDRRO0x00000000Debug Tracked ID Register
0xC014GITS_TRKTGTRRO0x00000000Debug Tracked Target Register
0xC018GITS_TRKICRRO0x00000000Debug ITE Cache Statistics
0xC01CGITS_TRKLCRRO0x00000000Debug LPI Cache Statistics

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