2.2.2. TBU interfaces

The MMU-500 supports the following TCU interfaces:

ACE-Lite interfaces

The MMU-500 uses the ACE-Lite interfaces to receive transactions, translate transactions, and perform PTWs.

You can connect the AXI3 or AXI4 bus to this interface with certain limitations as described in AXI3 and AXI4 support.

In this mode, the MMU-500 generates barrier transactions and updates attributes of input barrier transactions. Barrier transactions guarantee the ordering and observation of transactions in a system.

See the ARM® AMBA® AXI and ACE Protocol Specification AXI3™, AXI4™, and AXI4-Lite™ ACE and ACE-Lite for more information on barrier transactions.

The MMU-500 supports DVM signaling for TLB maintenance operations on its PTW port.

AXI slave interface

The MMU-500 supports only the ACE-Lite slave interface for every TBU. You must tie the extra ACE-Lite signals to their inactive values and the sysbardisable_<tbuname> signal to HIGH to use the AXI3 or AXI4 interfaces.

You must connect pin-to-pin the read address, write address, read data, write data, and buffered write response channels of the ACE-Lite slave interface, with _s suffix, to an ACE-Lite master interface. In a system, the master interface can be the AXI bus infrastructure output, or the output of a bridge that converts another bus protocol to AXI.

Note

A PTW read interface might be present depending on the specified configuration.

AXI master interface

The MMU-500 supports only the ACE-Lite master interface for every TBU and PTW read interface of the TCU. You must tie the extra ACE-Lite signals to their inactive values and the sysbardisable_<tbuname> signal to HIGH to use AXI3 or AXI4 interfaces.

The ACE-Lite master interface, with _m suffix, drives the translated address to the downstream slave. You must connect pin-to-pin the read address, write address, read data, write data, and buffered write response channels to the corresponding ACE-Lite slave interface.

If the MMU-500 is configured to support a dedicated interface for PTWs, you must connect the read address and read data channels of the slave interface associated with the PTWs to the MMU-500 PTW channel. In this configuration, the PTW channel contains the _ptw suffix. For example, araddr_ptw and acaddr_ptw.

Note

A PTW read interface might be present depending on the specified configuration.

Snoop channel interface

The AC channel of the ACE-Lite interface of the MMU-500 is connected to the CCI-driven AC channel or to the ACE-compatible slave interface that supports DVM messaging. ARM recommends that you use the DVM channel for TLB maintenance operations. If the system cannot access the DVM channel, the acvalid signal must be tied LOW, and the programming interface can be used for TLB maintenance operations.

When you configure the MMU-500 to provide a dedicated AXI channel to perform PTWs, the AC channel must be part of the PTW channel.

This interface supports the following:

Snoop data channel

The snoop data channel is not connected to the MMU-500.

Note

The snoop data channel is not supported in the MMU-500.

Snoop address channel

The 44-bit wide snoop address channel is connected to the TCU.

TBU barrier support

The TBU in the MMU-500 receives, passes on, and generates barriers of its own in response to the SYNC signal received from the TCU DVM channel.

The MMU-500 generates the DSBSYS barrier after ensuring that all invalidation-related transactions are initiated on receiving one of the following:

  • The programmed SYNC message.

  • The DVM SYNC message.

See the ARM® AMBA® AXI and ACE Protocol Specification AXI3™, AXI4™, and AXI4-Lite™ ACE and ACE-Lite for more information on SYNC and DVM SYNC messages.

Sideband interface

This interface provides associated information along with the ACE-Lite interface. See Sideband signals for more information.

Note

The stream and security state determination are associated with the ACE-Lite slave interface to each TBU.

Stream interface

This interface is a sideband interface for the MMU-500 TBU slave interface. It provides information about the translation mechanism that the MMU-500 applies to an incoming transaction.

The MMU-500 samples signals in the interface along with each valid address transaction.

See Stream ID for more information.

Security State Determination interface

This interface is a sideband interface for the MMU-500 TBU slave interface. It provides information about the security state of a transaction.

Similar to the Stream interface, the MMU-500 samples signals in this interface along with each valid address transaction.

See Security determination for more information.

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