A.2.5. Read data channel signals

Table A.11 shows the ACE-Lite read data channel signals for the TBU.

Table A.11. TBU read data channel signals

ACE-LiteTBU slave portWidthI/OTBU master portWidthI/O
RIDrid_<tbuname>_s[a]SIWOarid_<tbuname>_m[b]MIWI
RDATA

rdata_<tbuname>_s[c]

WDWIrdata_<tbuname>_mWDWI
RRESP[d]rresp_<tbuname>_s2Orresp_<tbuname>_m4I
RLASTrlast_<tbuname>_s1Orlast_<tbuname>_m1I
RVALIDrvalid_<tbuname>_s1Orvalid_<tbuname>_m1I
RUSERruser_<tbuname>_sRUSER[e]Oruser_<tbuname>_mRUSERI
RREADYrready_<tbuname>_s1Irready_<tbuname>_m1O

[a] The slave ID width, SIW, which is same as the configured AXI ID signal width. See Table 1.1 for more information.

[b] The master ID width, MIW, is the calculated output ID width. See Output ID width for more information.

[c] The read data width, RDW, which is same as the configured write data width parameter. See Table 1.1 for more information.

[d] In the ACE-Lite specification, the RRESP signal is two bits wide. However, when a shared interface is used in the MMU-500 to enable DVM operation, the ACE protocol definition is used to include AC and CR signals. As a result, the RRESP signal is increased in size by two bits, that is [3:2]. Bit[3] and bit[2] are not on ACE-Lite interfaces, so you can tie the RRESP[3:2] signal to 0x0.

[e] The width of the RUSER signal, specified by the Width of the AXI slave interface RUSER signals parameter. See Table 1.1 for more information.


Table A.12 shows the ACE-Lite read data channel signals for the TCU.

Table A.12. TCU read data channel signals

ACE-LiteTCU slave portWidthI/OTCU master portWidthI/O
RIDarid_prog(AXIPID+1)[a]Iarid_ptwMIW[b]I
RDATA

rdata_prog

64O

rdata_ptw

128I
RRESP[c]rresp_prog2Orresp_ptw4I
RLASTrlast_prog1Orlast_ptw1I
RVALIDrvalid_prog1Orvalid_ptw1I
RUSER---ruser_ptwRUSERI
RREADYrready_prog1Irready_ptw1O

[a] The AXI programming interface ID signal width, AXIPID, is the AXI programming interface ID signal width parameter. See Table 1.1 for more information.

[b] The master ID width, MIW, is the calculated output ID width. See Output ID width for more information.

[c] In the ACE-Lite specification, the RRESP signal is two bits wide. However, when a shared interface is used in the MMU-500 to enable DVM operation, the ACE protocol definition is used to include AC and CR signals. As a result, the RRESP signal is increased in size by two bits, that is [3:2]. Bit[3] and bit[2] are not on ACE-Lite interfaces, so you can tie the RRESP[3:2] signal to 0x0.


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