A.2.2. Write data channel signals

Table A.5 shows the ACE-Lite write data channel signals for the TBU.

Table A.5. TBU write data channel signals

ACE-LiteTBU slave portWidthI/OTBU master portWidthI/O
WDATA

wdata_<tbuname>_s

(WDW+1)[a]Iwdata_<tbuname>_m(WDW+1)O
WSTRB

wstrb_<tbuname>_s

(WSW+1)[b]I

wstrb_<tbuname>_m

(WSW+1)O
WLASTwlast_<tbuname>_s1Iwlast_<tbuname>_m1O
WVALIDwvalid_<tbuname>_s1Iwvalid_<tbuname>_m1O
WUSERwuser_<tbuname>_sWUSER[c]Iwuser_<tbuname>_mWUSERO
WREADYwready_<tbuname>_s1Owready_<tbuname>_m1I

[a] The write data width, WDW, which is same as the configured AXI data bus width parameter. See Table 1.1 for more information.

[b] The write strobe width, WDW, which is 1/8 times the configured AXI data bus width parameter. See Table 1.1 for more information.

[c] The width of the wuser signal, specified by the Width of the AXI slave interface WUSER signals parameter. See Table 1.1 for more information.


Table A.6 shows the ACE-Lite write data channel signals for the TCU.

Table A.6. TCU write data channel signals

ACE-LiteTCU slave portWidthI/OTCU master port[a]WidthI/O
WDATA

wdata_prog

64I

wdata_ptw

(WDW+1)[b]O
WSTRB

wstrb_prog

8I

wstrb_ptw

(WSW+1)[c]O
WLASTwlast_prog1Iwlast_ptw1O
WVALIDwvalid_prog1Iwvalid_ptw1O
WUSER---wuser_ptwWUSERO
WREADYwready_prog1Owready_ptw1I

[a] For PTW, the write data channel signals are unused.

[b] The write data width, WDW, which is same as the configured write data width parameter. See Table 1.1 for more information.

[c] The write strobe width, WDW, which is 1/8 times the configured write data width parameter. See Table 1.1 for more information.


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