2.3.3. Hit-Under-Miss

Hit-under-miss (HUM) translates a TLB miss transaction and passes the transaction to a downstream slave if the translated TLB miss transaction results in a TLB hit. HUM allows responding to the master if there is a TLB hit for a subsequent transaction while the MMU-500 is performing a translation for a previous transaction that had a TLB miss. HUM characteristics for read and write transactions are as follows:

Example 2.1 shows a HUM condition.

Example 2.1. HUM condition

Consider that the write buffer depth is eight and there are two missed write transactions of lengths four and three. Both missed write transactions are stored in the write buffer during the PTWs for the transactions. If you perform another transaction before the missed write transactions are processed, the new transaction is passed through, if that access results in a TLB hit.


Note

If the write buffer is full with missed write transactions, HUM cannot occur.

Copyright © 2013, 2014 ARM. All rights reserved.ARM DDI 0517C
Non-ConfidentialID031814