2.4.2. Macro TLB

The macro TLB caches PTW results in the TCU. You can configure the depth of the macro TLB based on your requirements.

Figure 2.8 shows the TCU cache structure that consists of macro TLBs, prefetch buffers, IPA2PA cache, and PTW caches.

Figure 2.8. TCU cache

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See Additional reading for more information on the TCU configurability.

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