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| Non-Confidential | ID041216 |
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The following information applies to the MMU-500 registers:
Registers are implemented according to the ARM® System Memory Management Unit Architecture Specification with the security extensions implemented in the MMU-500 as follows:
Unless otherwise stated in the accompanying text:
Do not modify undefined register bits.
Ignore undefined register bits on reads.
All register values are unknown on reset unless otherwise stated.
The access types of the MMU-500 registers are as follows:
Read-As-One.
Read-As-One, Should-Be-One-or-Preserved on writes.
Read-As-One, Writes-ignored.
Read-As-Zero.
Read-As-Zero, Should-Be-Zero-or-Preserved on writes.
Read-As-Zero, Write-ignored.
Read-only.
Read and write.
Should-Be-One.
Should-Be-One-or-Preserved.
Should-Be-Zero.
Should-Be-Zero-or-Preserved.
Unknown.
Write-ignored.
Write-not-read.
Write-only.
| Copyright © 2013, 2014, 2016 ARM. All rights reserved. | ARM DDI 0517F |
| Non-Confidential | ID041216 |
| PDF version | |
| Home > Programmers model > About this programmers model |