4.2.1. ACTLR Register

The ACTLR characteristics are:


Provides configuration and control options regarding the use of the Global Exclusive Monitor by the LDREX and STREX instructions.

Usage constraints

Privileged access permitted only. Unprivileged accesses generate a BusFault.

This register is word accessible only. Halfword and byte accesses are unpredictable.


Figure 4.1 shows the ACTLR bit register assignments.

Figure 4.1. ACTLR bit register assignments

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Table 4.3 shows the ACTLR register bit assignments.

Table 4.2. ACTLR bit register assignments


LDREX and STREX instructions only use the Global Exclusive Monitor on Shared regions, either in the default memory map, or when hitting in a Shared MPU region.


LDREX and STREX instructions always use the Global Exclusive Monitor, even if the memory region is not Shared.


  • If the Security Extension is implemented, this bit is banked between Security states.

  • Accesses to Device regions in the ranges 0x40000000-0x5FFFFFFF and 0xC0000000-0xFFFFFFFF do not use the Global Exclusive Monitor when ACTLR.EXTEXCLALL is 0 and the default memory map is used.


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