ARM Cortex-M23 Processor Technical Reference ManualRevision: r1p0
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6.2. SAU register summary

Table 6.2 shows the SAU registers. Each of these registers is 32 bits wide.

Table 6.2. SAU registers

NameReset valueDescription
SAU_CTRL0x00000000[a]Security Attribution Unit Control Register.
SAU_TYPE[b]UNKNOWNSecurity Attribution Unit Type Register.
SAU_RNRUNKNOWNSecurity Attribution Unit Region Number Register.
SAU_RBARUNKNOWNSecurity Attribution Unit Region Base Address Register.
SAU_RLAR0x00000000[c]Security Attribution Unit Region Limit Address Register.

[a] The reset value is 0x00000002 if the Security Extension is not implemented (write ignored).

[b] Bits[7:0] depend on the number of SAU regions included. This value can be 0, 4, or 8.

[c] Read-only.


Note

See the ARM®v8-M Architecture Reference Manual for more information about the SAU registers and their addresses, access types, and reset values.

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