A.7.2. JTAG and SWD signals
The table below lists the interface signals for the JTAG and
SWD subsystem.
Table A.17. JTAG and SW Debug access functional signals
| Name | Direction | Width | Description |
|---|
| DAPSWDITMS | Input | 1 | Debug TMS. |
| DAPSWDO | Output | 1 | Serial Wire Data Out. |
| DAPSWDOEN | Output | 1 | Serial Wire Output Enable. |
| DAPTDI | Input | 1 | Debug TDI. |
| DAPTDO | Output | 1 | Debug TDO. |
| DAPNTDOEN | Output | 1 | TDO output pad control signal. |
| DAPJTAGNSW | Output | 1 | JTAG or Serial-Wire selection JTAG mode(1)
or SW mode(0). |
| DAPJTAGTOP | Output | 1 | JTAG-DP TAP controller in one of four top states
TLR, RTI, Sel-DR, Sel-IR. |
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