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| Non-Confidential | ID040616 |
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| Home > Programmers Model > Register descriptions > Peripheral ID Register, PIDR2 |
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Peripheral ID register.
RO register at offset 0xFE8.
Table 3.15. PIDR2 register
| Bits | Name | Description | Access | Reset |
|---|---|---|---|---|
[31:8] | Reserved | - | RO, RAZ | 0 |
[7:4] | REVISION | Revision number of the peripheral | RO | 0x0 |
3 | JEDEC | Always set. Indicates that a JEDEC assigned value is used. | RO | 1 |
[2:0] | DES_1 | JEP106 identification code bits [11:8]. | RO | 0x3 |
| Copyright © 2016. All rights reserved. | ARM DDI 0569A |
| Non-Confidential | ID040616 |
| PDF version | |
| Home > Programmers Model > Register descriptions > Peripheral ID Register, PIDR2 |