18.1.3. Debug events

The debug logic of the processor is responsible for generating debug events. A debug event is some part of the process being debugged that causes the system to notify the debugger. Debug events include events such as a breakpoint unit matching the address of an instruction against the address stored in its registers. They can be synchronous or asynchronous. Breakpoints, the BRK and HLT instructions, and Watchpoints are all synchronous debug events. The processor turns a debug event into one of a number of actions, namely:

The conversion of debug events into exceptions or entry to Debug state depends on the configuration of the debug logic and the type of debug event. For example, some debug events never cause entry to Debug state and others never cause a debug exception. A debug event is never converted into both a debug exception and an entry to Debug state.Sometimes the processor is not able to convert the debug event into one of these actions, despite the configuration of the debug logic. This is because to do so would breach the security model of the processor. If the processor is executing in Secure state and the external debugger attached to it is not trusted, the processor does not allow entry to debug state.

Software debug events

Software debug events are:

  • Breakpoint debug events.

  • Watchpoint debug events.

  • Software Step debug events.

  • Software Breakpoint Instruction debug events.

  • Vector Catch debug events.

Other than the cases described in Use of breakpoints and watchpoints by external debug below, breakpoint and watchpoint debug events:

  • Generate a debug exception to the debug exception target Exception level if enabled for the current security state and Exception level.

  • Software Step debug events are generated only when debug exceptions are enabled.

  • Software Breakpoint Instruction debug events always generate a debug exception.

Breakpoint debug event

Address breakpoints generate debug events by comparing values held in system registers with instruction addresses.

Some breakpoints are context-aware and can be programmed as Context breakpoints that compare with the values of the context ID or (in Non-secure state) Virtual Machine Identifier (VMID).A breakpoint can be programmed to match only in certain modes, Exception levels and security states. Address breakpoints can be linked to Context breakpoints.The number of breakpoints in a processor is implementation defined.

Watchpoint debug event

Address watchpoints generate debug events by comparing values held in system registers with data addresses generated by load and store instructions.A watchpoint can be programmed to match only in certain modes, Exception levels and security states. Address watchpoints can be linked to Context breakpoints.Watchpoints can also be programmed to match on access type; that is, match only loads, match only stores, or match both loads and stores. Watchpoints do not match against instruction fetches.The number of watchpoints in a processor is defined by the implementation.

Software Step debug event

A Software Step debug event is used to single-step an instruction, that is to execute a single instruction and then return control to the debugger. To single-step an instruction:

  1. The debugger software enables Software Step.

  2. The debugger software sets the PC to the instruction to be stepped.

  3. The processor executes that single instruction.

  4. A Software Step exception is taken on the next instruction.

However, another synchronous exception may be generated whilst the instruction is being stepped.

Software breakpoint instruction debug event

The A64 instruction set defines a software breakpoint instruction.

  BRK		#<immediate>

The A32 and T32 instruction sets define software breakpoint instructions.

  BKPT		#<immediate>

Software breakpoint instructions generate synchronous debug exceptions that cannot be masked.

Vector Catch debug event

Vector Catch debug events are only generated in an AArch32 stage 1 translation regime, and only generate debug exceptions. Vector Catch exceptions are only generated from AArch32 state.

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