15.1.1. Power and clocking

One way that can reduce energy use is to remove power, which removes both dynamic and static currents (sometimes called power-gating), or to stop the clock of the core which removes dynamic power consumption only and can be referred to as clock-gating.

ARM cores typically support several levels of power management, as follows:

For certain operations, there is a requirement to save and restore the state before and after removing power. Both the time taken to do the save and restore, and the power consumed by this extra work can be an important factor in software selection of the appropriate power management activity.

The SoC device that includes the core can have additional low-power states, with names such as STOP and Deep sleep. These refer to the ability for the hardware Phase Locked Loop (PLL) and voltage regulators to be controlled by power management software.

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