6.4. Flow control

The A64 instruction set provides a number of different kinds of branch instructions (see Table 6.12). For simple relative branches, that is those to an offset from the current address, the B instruction is used. Unconditional simple relative branches can branch backward or forward up to 128MB from the current program counter location. Conditional simple relative branches, where a condition code is appended to the B, have a smaller range of ±1MB.

Calls to subroutines, where it is necessary for the return address to be stored in the link register (X30), use the BL instruction. This does not have a conditional version. BL behaves as a B instruction with the additional effect of storing the return address, which is the address of the instruction after the BL, in register X30.

Table 6.12. Branch instructions

Branch instructions
B (offset)

Program relative branch forward or back 128MB.

A conditional version, for example B.EQ, has a 1MB range.

BL (offset)

As B but store the return address in X30, and hint to branch prediction logic that this is a function call.

BR Xn

Absolute branch to address in Xn.

BLR Xn

As BR but store the return address in X30, and hint to branch prediction logic that this is a function call.

RET{Xn}

As BR, but hint to branch prediction logic that this is a function return.

Returns to the address in X30 by default, but a different register can be specified.

Conditional branch instructions
CBZ Rt, labelCompare and branch if zero. If Rt is zero, branch forward or back up to 1MB.
CBNZ Rt, labelCompare and branch if non-zero. If Rt is not zero, branch forward or back up to 1MB.
TBNZ Rt, bit, labelTest and branch if zero. Branch forward or back up to 32kB.
TBNZ Rt, bit, labelTest and branch if non-zero. Branch forward or back up to 32kB.

In addition to these PC-relative instructions, the A64 instruction set includes two absolute branches. The BR Xn instruction performs an absolute branch to the address in Xn while BLR Xn has the same effect, but also stores the return address in X30 (the link register). The RET instruction behaves like BR Xn, but it hints to branch prediction logic that it is a function return. RET branches to the address in X30 by default, though other registers can be specified..

The A64 instruction set includes some special conditional branches. These allow improved code density in some cases because an explicit comparison is not necessary.

These instructions compare the source register, either 32-bit or 64-bit, with zero and then conditionally perform a branch. The branch offset has a range of ± 1MB. These instructions do not read or write the condition code flags (NZCV).

There are two similar test and branch instructions

These instructions test the bit in the source register at the bit position specified by the immediate and conditionally branch depending on whether the bit is set or clear. The branch offset has a range of ±32kB. As with CBZ/CBNZ, these instructions do not read or write the condition code flags (NZCV).

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