8.2.1. Assembly code

Many A32 assembly instructions can be easily replaced with similar A64 instructions. Unfortunately there is no automated mechanism. However, much can be fairly simply translated. The following table shows the close match in many areas between the A32/T32 and A64 instruction sets.

Table 8.2. Instructions that are similar for A32 and A64

A32A64
ADD Rd,Rn,#7ADD Wd,Wn,#7
ADDS Rd,Rn,Rm,LSL #2ADDS Wd,Wn,Wm,LSL #2
B labelB label
BFI Rd,Rn,#lsb,#widBFI Wd,Wn,#lsb,#wid
BL labelBL label
CBZ Rn,labelCBZ Wn,label
CLZ Rd,RmCLZ Wd,Wm
LDR Rt,[Rn,#imm]LDR Wt,[Xn,#imm]
LDR Rt,[Rn,#imm]!LDR Wt,[Xn,#imm]!
MOV Rd,#immMOV Wd,#imm
MUL Rd,Rn,RmMUL Wd,Wn,Wm
RBIT Rd,RmRBIT Wd,Wm

However, there are differences in many areas that require rewrites. The following tables show some of these.

Table 8.3. Instructions that differ between A32 and A64

A32A64
LDM/STM and PUSH/POP instructions are replaced with LDP/STP (Load/Store Pair)
PUSH {r0-r1}STP X0, X1, [SP, #-16]!
POP {r0-r1}LDP X0, X1, [SP], #16
LDMIA r0, {r1, r2}LDP X1, X2, [X0], #8
STMIA r0, {r1, r2}STP X1, X2, [X0], #8
MLAMADD
BX <reg>BR <reg>

MOV pc, lr

BX lr

RET

MOVW

MOVT

MOVZ

MOVK


Note

The 64-bit APCS requires 128-bit (16 byte) stack alignment.

Table 8.4 shows how the CPSR is replaced by named fields within PSTATE.

Table 8.4. Use of named fields

 A32A64
                    CPSR is replaced with a set of separate registers and fields
Disable IRQ
MRS R0, CPSR
ORR R0, R0, #IRQ_Bit
MSR CPSR_c, R0
CPSID i
MSR DAIFSET, #IRQ_bit
ALU Flags
MRS R0, CPSR
MSR CPSR_f, R0
MRS X0, NZCV
MSR NZCV, X0
Set Endianness
SETEND BE

SCTLR_ELn.EE controls ELn data endianness

SCTLR_EL1.E0E controls EL0 data endianness

MRS X0, SCTLR_EL1
ORR X0, X0, #EE_bit
MSR SCTLR_EL1, X0
See Endianness.

The T32 conditional execution scheme compiles to the sequence as shown in the A32 column of Table 8.4. In A64, it makes use of the new conditional select instructions as shown in the A64 column.

The difference between conditional execution in the two instruction sets (T32 and A64) is illustrated by the following example:

                             //C code
                             int gcd (int a, int b)
                             {
                               while (a ! = b)
                               {
                                   if (a >b)
                                   {
                                     a = a - b;
                                   }
                                   else
                                   {
                                     b = b - a;
                                   }
                                return a;
                               }

           //A32                                     //A64
          gcd:                                    gcd:
            CMP   R0, R1                            SUBS  W2, W0, W1
            ITE                                     CSEL  W0, W2, W0, gt
            SUBGT R0, R0, R1                        CSNEG W1, W1, W2, gt
            SUBLE R1, R1, R0                        BNE   gcd
            BNE   gcd                               RET
            BX    lr 
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