12.3.3. Operation when the Memory Management Unit is disabled

When the stage 1 MMU is disabled, for Non-secure EL0 and EL1 accesses when the HCR_EL2.DC bit is set to enable the data cache, the default memory type is Normal Non-shareable, Inner Write-Back Read-Write Allocate, Outer Write-Back Read-Write Allocate.

Copyright © 2015 ARM. All rights reserved.ARM DEN0024A
Non-ConfidentialID050815