6.3. Power domains and system design

You can implement common or several distinct power domains depending on the power requirements of the SoC. CoreSight technology supports the implementation of a separate debug power domain if you determine that it is necessary to shut down, or alternatively, IEM-enable, the debug and trace logic in the SoC.

Figure 6.1 shows a system that implements the following power domains:

Pcore

The core domain.

PSoC

The SoC domain.

Pon

The always on domain.

In this example, the core is IEM enabled, the SoC infrastructure is not. LSCs exist between the core and SoC domains. There is a clamp between the SoC domain and the always on domain for the external SWJ interface to the DAP. The SWJ power must always be on.

Figure 6.1. CoreSight system with no separate debug domains

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Figure 6.2 shows the same system enhanced to support a separate debug power domain, indicated by Pdbg. In this example, the core is IEM-enabled, and the separate debug power domain enables power-down of the entire debug and trace infrastructure independently of the rest of the system. This system must have clamps at component interfaces that cross between the debug and SoC power domains.

In Figure 6.2, the core is IEM-enabled and the SoC infrastructure is not. The external SWJ interface to the DAP must be always powered-on.

Figure 6.2. CoreSight system with a separate debug power domain

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