5.2.1. Differences between on-chip and off-chip storage

To decide when to implement an ETB or ETR for on-chip storage, or a TPIU for off-chip storage in a TPA, you must consider the following:

Systems with an ETB and a TPIU

Sometimes it is advantageous to implement a TPIU with its Trace Port, and an on-chip buffer such as an ETB, in the same chip. See Figure 5.1. Usually the Trace Port in such devices is only capable of a small amount of trace, for example, it might only have sufficient bandwidth for instruction trace. This permits you to use the trace in different ways:

  • Use the on-chip buffer when you require full trace over a short period. This is most useful when debugging the behavior of a well-defined section of software, when you can use filtering and the time between an error in the code and the detection of the bug by the trigger condition is small.

  • Use the TPIU and TPA when you require trace over a long period. For example, when you cannot use filtering, or the time between an error in the code and the detection of the bug by the trigger condition is large.

  • Use the TPIU and TPA when you derive profiling information from the trace. This requires a large amount of information and is usually concerned only with instruction trace.

In systems where the same ATB feeds both the on-chip trace sink and TPIU, it is not recommended that you enable both devices at the same time. If you do this, the device with the higher potential bandwidth receives trace at the same rate as the slower one. For example, a 32-bit ETB can only have a quarter of its maximum bandwidth as a similarly clocked TPIU if the TPIU is configured to only use 8-bits of the Trace Port and is operating on the same trace data stream. This is because a replicator stalls its input if either output stalls.

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