The trace that CoreSight trace sources generate must be captured by one or more Trace Capture Devices (TCDs). The following common forms of TCD exist:

Logic Analyzers are expensive and are less well supported by development tools, but can often capture trace at higher speeds than is possible with a TPA. Most developers capture trace using a TPA or on-chip trace buffer.

The CoreSight ETB and ETR is an ATB slaves and connects to the CoreSight system directly to enable capture of trace data on-chip. A TPA or Logic Analyzer must connect to the pins of a trace port, that is driven by a TPIU.

Most systems implement either one ETB or one TPIU. However, it is possible to implement multiple trace sink components using a CoreSight Replicator. See Systems with an ETB and a TPIU.

Figure 5.1 shows a system that implements an ETB and a TPIU connected to a TPA.