2.2.1. Buses

The CoreSight systems use the following bus protocols to connect components together, and to enable integration in a SoC:

AMBA Trace Bus (ATB)

The ATB transfers trace data through the CoreSight infrastructure in a SoC. Trace sources are ATB masters, and sinks are ATB slaves. Link components provide both master and slave interfaces.

The ATB protocol supports:

  • Stalling of trace sources to enable the CoreSight components to funnel and combine sources into a single trace stream.

  • Association of trace data with the generating source using trace source IDs. A CoreSight system can trace up to 111 different items at any one time.

  • Capture and transfer of multiple byte bus widths, currently to 32-bits.

  • A flushing mechanism to force historic trace to drain from any sources, links, or sinks up to the point that the request was initiated.

For more information about ATB, see the AMBA ATB Protocol Specification.

AMBA 3 APB

CoreSight supports the AMBA 3 APB protocol to enable transfer extension using wait states.

The Debug APB bus uses the AMBA 3 APB protocol within a CoreSight system. The Debug APB is a bus dedicated to the connection of debug and trace components in a CoreSight- compliant SoC. All CoreSight components are configured and accessed over this bus through the APB-Mux in the DAP.

For more information about AMBA 3 APB, see the AMBA 3 APB Protocol Specification.

Advanced High-performance Bus (AHB)

CoreSight supports access to a system bus infrastructure using the AHB Access Port (AHB-AP) in the DAP. The AHB-AP provides an AHB master port for direct access to system memory.

CoreSight also supports AHB bus tracing using an AHB Trace Macrocell (HTM) that provides non-invasive debug visibility to any bus transactions on AHB connections.

For more information on AHB, see the AMBA Specification.

AMBA Advanced eXtensible Interface (AXI)

CoreSight supports the use of AXI in the system interconnect. Direct access to the AXI system can be provided through a Cortex core as an AXI bus master, or through the use of an AHB to AXI bridge on the AHB Access Port in the DAP.CoreSight also supports trace generation from bus masters on the AXI through the use of the STM that converts stimulus writes to the device into a trace data stream.For more information on AXI, see the AMBA Specification.

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