3.3.11. Feedback Controlled Scale Register

The ki_fc Register characteristics are:

Purpose

This register enables you to program a latency regulation value, AWQOS or ARQOS, scale factor coded for powers of 2 in the range 2-3 to 2-10, to match a 16-bit integrator. See Transaction latency regulation and Address request period regulation for more information.

Usage constraints

There are no usage constraints.

Configurations

Only available when you select latency regulation in AMBA Designer.

Attributes

Figure 3.11 shows the bit assignments.

Figure 3.11. ki_fc Register bit assignments

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Table 3.12 shows the bit assignments.

Table 3.12. ki Register bit assignments

BitsNameFunction
[31:11]-Reserved. Do not modify. Read as zero.
[10:8]ar_kiARQOS scale factor, power of 2 in the range 2-3 to 2-10.
[7:3]-Reserved. Do not modify. Read as zero.
[2:0]aw_kiAWQOS scale factor, power of 2 in the range 2-3 to 2-10.

Table 3.13 defines the translation from the programmed value to the scale factor used to derive the QoS value from the latency integrator. See Transaction latency regulation and Address request period regulation for more information.

Table 3.13. Latency regulation scale factor translation

Latency regulation value

Latency regulation scale factor

0x02-3
0x12-4
0x22-5
0x32-6
0x42-7
0x52-8
0x62-9
0x72-10

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