ARM CoreLink QoS-400 Network Interconnect Advanced Quality of Service Supplement to CoreLink NIC-400 Network Interconnect Technical Reference Manual: 3.3.11. Feedback Controlled Scale Register

The ki_fc Register characteristics are:

Purpose: This register enables you to program a latency regulation value, AWQOS or ARQOS, scale factor coded for powers of 2 in the range 2^-3 to 2^-10, to match a 16-bit integrator. See Transaction latency regulation and Address request period regulation for more information.
Usage constraints: There are no usage constraints.
Configurations: Only available when you select latency regulation in AMBA Designer.
Attributes: See Table 3.1.

Figure 3.11 shows the bit assignments.

Figure 3.11. ki_fc Register bit assignments

Table 3.12 shows the bit assignments.

Table 3.12. ki Register bit assignments

Bits	Name	Function
[31:11]	-	Reserved. Do not modify. Read as zero.
[10:8]	ar_ki	ARQOS scale factor, power of 2 in the range 2^-3 to 2^-10.
[7:3]	-	Reserved. Do not modify. Read as zero.
[2:0]	aw_ki	AWQOS scale factor, power of 2 in the range 2^-3 to 2^-10.

Table 3.13 defines the translation from the programmed value to the scale factor used to derive the QoS value from the latency integrator. See Transaction latency regulation and Address request period regulation for more information.

Table 3.13. Latency regulation scale factor translation

Latency regulation value	Latency regulation scale factor
`0x0`	2^-3
`0x1`	2^-4
`0x2`	2^-5
`0x3`	2^-6
`0x4`	2^-7
`0x5`	2^-8
`0x6`	2^-9
`0x7`	2^-10

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