2.2.1. TLX

The TLX consists of two AXI stream interfaces for each direction:

Figure 2.3 shows the TLX hierarchical structure.

Figure 2.3. TLX hierarchical structure

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The data stream links transport the AMBA forward and reverse channel beats. The flow stream interfaces are used for replenishment of credit tokens.

This architecture means that the TLX bridge operation is independent of the physical layer latency.

This section describes:

Forward AMBA channels

To guarantee that the data link does not stall and therefore cause blocking between channels, a forward channel beat is only issued onto the forward data stream link when that channel has credit, indicating that there is space at the destination to accept that beat. Therefore, a channel credit is consumed when a beat is issued into the physical layer data stream link. The number of credits is equal to the number of buffer slots available for that channel at the destination. When the credits are all consumed for a channel, then no more beats are issued onto the data stream interface.

When a destination buffer slot is emptied through a beat being issued downstream out of the thin link bridge, a flow control credit for that channel is returned back across the reverse flow control stream link.

Response AMBA channels

To guarantee that the data link does not stall and therefore cause blocking between channels, a reverse channel beat is issued onto the reverse data stream link when that channel has credit, indicating that there is space at the destination to accept that beat. Therefore, the credit of a channel is consumed when a beat is issued into the physical layer data stream link. The number of credits is equal to the number of buffer slots available for that channel at the destination. When the credits are all consumed for a channel then no more beats are issued onto the data stream interface.

When a destination buffer slot is emptied through a beat being issued back upstream out of the TLX bridge, a flow control credit for that channel is then returned back across the forward flow control stream link.

Data packing

Five different packing strategies are available. There is no requirement to use the same strategy in both forward and reverse directions:

  • Widest Width.

  • Widest Width / 2.

  • Widest Width / 4.

  • Forward or Reverse channels:

    • Address Width + Data Width, for forward channels only.

    • Read Data Width + Response, for reverse channels only.

  • User Defined.

Widest Width

This is the width of the widest channel in the direction under consideration.

Widest Width / 2

This is half the width of the widest channel in the direction under consideration.

Widest Width / 4

This is a quarter of the width of the widest channel in the direction under consideration.

Forward or Reverse channels:
  • Address Width + Data Width.

    This is the widest address channel plus the widest data width in the forward link direction.

  • Read Data Width + Response.

    This is the width of the read data plus response in the reverse link direction.

User Defined (in Bytes)

This is any multiple byte width up to a maximum of the widest channel / 2.

Note

See Configuring Thin Links in the Configuring the Network chapter of the ARM® CoreLink™ NIC-400 Network Interconnect Supplement to ARM® CoreLink™ ADR-400 AMBA® Designer User Guide.

Arbitration

This entails arbitration of which channel to issue to the link. When there is a choice of channels available, it is achieved by using the awqos value, arqos value, or the stored awqos value associated with the current W channel traffic. The reverse link selection uses a round robin arbitration.

Note

For more information on axqos values, see the ARM® CoreLink™ QoS-400 Network Interconnect Advanced Quality of Service, Supplement to ARM® CoreLink™ NIC-400 Network Interconnect Technical Reference Manual.

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