2. About the AXI downwards-synchronizing bridge

The AXI downwards-synchronizing bridge, SyncDnAxi, enables a fast AXI clock domain to communicate with a slower one using a common clock select.

Figure 1 shows SyncDnAxi used in a system where an AXI master is running at 200MHz and an AXI slave is running at 100MHz.

Figure 1. Downwards-synchronizing bridge block diagram

The SyncDnAxi n:1 bridge has the following features:

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