3.1. Operating modes

You can configure the RegSliceAxi to operate in one of three modes for each AXI channel as described in:

Fully registered

This is the default configuration. It provides complete timing isolation between two points within an AXI interconnect. Figure 2 shows this.

Figure 2. Fully registered configuration

Registered forward path

The valid and payload signals are isolated in this configuration. The ready signal for the channel source is a combinatorial path from the channel destination. Figure 3 shows this.

Figure 3. Registered forward path configuration

Static bypass

No timing isolation is used in this configuration. The master and slave interfaces of the channel are directly connected. Figure 4 shows bypass mode.

You can include the register slice in a system design irrespective of requirement. If initial synthesis runs then show critical paths through the interconnect, you can switch the register slice out of bypass mode to solve the problem.

Figure 4. Static bypass configuration

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